) connected as voltage followers in a bridge configuration. If we need more power we could use two operational amplifiers ( Shows an alternative-a simple circuit to boost the drive capability of the output buffers. It is thus possible to parallel outputs to increase the DC drive capability, but it is not a good idea to do so because we may damage or destroy the chip (by exceeding the maximum metal electromigration limits). Although contention for short periods may not be destructive, it increases power dissipation and should be avoided. If this happens we essentially short VDD to GND for a brief period. Contention will occur if, due to delays in the signal arriving at two output cells, one output buffer tries to drive an output high while the other output buffer is trying to drive the same output low.

If the output cells are not adjacent or are on different chips, there is a risk of contention. typical values range from 50 to 200 mA.Ĭan we drive the motors by connecting several output buffers in parallel to reach a peak drive current of 0.5 A? Some FPGA vendors do specifically allow you to connect adjacent output cells in parallel to increase the output drive. Thus we normally do not know the value of Most vendors do not specify output characteristics because they are difficult to measure in production. , that results, we find that a buffer is capable of sourcing and sinking far more than the specified , of an output buffer, using a voltage supply, and measure the output current, Is negative) through a pull-down resistor, (c) Pull-up transistor M1 (M2 is off) sources (from VDD) current (b) Pull-down transistor M2 (M1 is off) sinks (to GND) a current = 4.0 V for a technology-without referring to the current values at which these are measured-strictly this is incorrect. Similarly, when the output is 4 V, the buffer can CMOS logic inputs that may be connected to the pad draw minute amounts of current, but bipolar TTL inputs can require several milliamperes. No more than 8 mA if the load requires it. The Xilinx XC5200 specifications show that the output buffer can force the output pad to 0.4 V or lower and Input currents, if there are any, are positive if they flow into the inputs. , is positive if it flows into the output. As an example, values for the Xilinx XC5200 are as follows

Data books typically specify the output characteristics at two points, A

Shows a CMOS complementary output buffer used in many FPGA I/O cells and its DC characteristics.

Totem pole transistor driver